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Breaking News -
Platforms:
Texas Instruments Eyes SETs To
Extend Life Of CMOS
Texas Instruments Inc (TI), working in conjunction with the Swiss Federal
Institute of Technology of Lausanne, will describe a potential way to use
single electron transistors (SETs) to perform logic functions and dramatically
reduce the size and power consumption of future semiconductor devices. A paper
to be presented at the prestigious International Electron Devices Meeting
(IEDM) will show that a combination of SETs and standard CMOS transistors can
provide enough gain and current drive to perform logic functions at a much
smaller scale than will eventually be possible with CMOS alone. SETs can
potentially take the industry all the way to the theoretical limit of
electrons for computing applications by allowing the use of a single electron
to represent a logic state.
"Looking out 10 years and beyond, TI sees that the CMOS roadmap will need
help
to continue to deliver the predictable returns the industry has counted on for
decades from Moore's Law," said Christoph Wasshuber, a Texas Instruments
scientist and co-author of the paper. "It is starting to look viable for CMOS
to continue to play a major role by providing a traditional system interface
to millions of radically smaller, lower power, single electron
transistors."
There is general agreement in the semiconductor industry that standard
silicon
CMOS should support scaling for the next 10 to 15 years using traditional
Field Effect Transistors that use large numbers of electrons in operation.
Advancement beyond that will require vastly different approaches in materials
and architecture to cost effectively manage the signal integrity and heat
problems created by so many tightly packed transistors. A range of alternative
state devices have shown promise, but the light, fast and strongly interacting
"charged electron" provided the foundation of modern computing.
Simulations to be present at IEDM are expected to show very encouraging
results and will address random background charges, an obstacle that had
effectively stopped major research on SETs, by using a modulation technique
that takes advantage of the periodic current voltage characteristic of
SETs.
The next challenge for researchers is to manufacture reliably many SETs in
a
CMOS compatible process on silicon. The first application for SETs could be
for memory and special applications in metrology, such as primary thermometers
and super sensitive electrometers.
TI closely links its chip design with advanced process technology
development
to manufacture products competitive with any company in the world. By offering
a variety of optimized process flows for each step on its technology roadmap,
TI provides the best performance for different end equipment requirements.
Adjustments to the transistors' gate length, threshold voltage, gate oxide
thickness or bias conditions all change the performance specification of the
millions of transistors on the final integrated circuit. The different flows
are carefully targeted to achieve a specific application balance between
transistor performance and power consumption, providing customers a range of
product options.
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