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DAILY NEWS AND INFORMATION FOR THE GLOBAL GRID COMMUNITY / JUNE 23, 2003: VOL. 2 NO. 25

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Breaking News - Networking:

RapidIO Expands To High-Speed Data Plane Applications

In an important roadmap extension of the RapidIO interconnect architecture, the RapidIO Trade Association announced plans to expand its application focus to fully cover data plane applications for telecommunications networks. The planned extensions will enable lower-cost standards-based products such as multiprotocol switches, 10 gigabit Ethernet switches, edge routers, SAN switches, DSLAMs and IP service switches. The resulting specifications will foster the replacement of current proprietary data fabrics with an open- standard technology, reducing development costs and accelerating time to market, through the adoption of off-the-shelf components. The extensions, expected to be finalized in early 2004, will retain compatibility with existing RapidIO switch and endpoint products based on the layered RapidIO architecture.

"This extension has intriguing system-level and chip-level implications," states Eric Mantion, senior analyst for the market research firm In-Stat/MDR. "It will enable new system configurations between blade servers, network and storage systems, as well as new enterprise telecom applications. It also lets designers 'massively cluster' many chips or cores within a system, since RapidIO is also a chip-to-chip interconnect."

In a separate effort, the PICMG(R) 3.5 subcommittee is being re-organized to map the full range of RapidIO protocols onto the AdvancedTCA platform architecture rather than limiting its attention to data plane oriented protocols alone. A PICMG 2.18 subcommittee, tasked with mapping RapidIO onto the CompactPCI(R) platform, was also recently approved.

"Extending RapidIO to an even broader range of data plane applications while carrying forward RapidIO's best-in-class control plane features creates a very compelling unified open interconnect architecture," says Dave Wickliff, RapidIO steering committee representative from Lucent Technologies. "Leveraging RapidIO standards onto AdvancedTCA via PICMG 3.5 will extend this open interconnect into the important box-level telecommunications platform. RapidIO provides an interconnect architecture that can homogenously span a complete platform: backplane, boards, mezzanines, and devices."

Richard Somes, PICMG Technical Officer, adds: "With the change in charter for the PICMG 3.5 subcommittee, RapidIO becomes a valuable High Speed Fabric option for the AdvancedTCA platform. The cooperative effort between PICMG and the RapidIO Trade Association adds to the considerable momentum behind the AdvancedTCA family of specifications for next generation carrier grade equipment."

The RapidIO data plane extension leverages efforts completed earlier by the RapidIO Trade Association, as well as work contributed by the Advanced Fabric Interface (AFI) working group.

"There was significant synergy between the goals of the Advanced Fabric Interface working group, and the vision for RapidIO, " says Chuck Hill, system architect with the Motorola Computer Group in Tempe, Arizona, who spearheaded the AFI effort. "An open standard with data plane features is essential to increased penetration of commercial off-the-shelf systems into certain telecom applications."

"This extension benefits current as well as future RapidIO users as it will impact all future data plane applications," says Sam Fuller, president of the RapidIO Trade Association. "We have strong interest from current and prospective members on this initiative. It's also further evidence of RapidIO momentum. It's an internationally certified standard and products based on RapidIO are available today. Designers around the world are using RapidIO's design software, silicon, simulation, verification, and testing tools to create high-performance embedded systems."

The RapidIO interconnect architectures are open standards available for review and downloading from the RapidIO Trade Association's website, www.rapidio.org. Also available at the website is information on system-enablement tools including RapidIO vendor product lists, synthesizable Verilog cores, analog physical layer cores, logic and protocol analyzers, operating system support, bus functional models, and hardware interoperability platforms.

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